References

jl) G.K. DuBEY, S.R. DoRADLA, a. Josm, and R.M.K. Siniia, Thyns<ori;ed Power CoistroUers, New Delhi:

Wiley Eastern, Ш., 19S6.

[2] J. VlTiiAYATliiL, Power Electronics: Principles and Applications, New York; McGraw-Hill, 1995,

[3] N. moman, T. Undeland, and W. Robbins, Power Electronics: Converters, Applications, and Design,

Second edition, New York: Jdin Wiley & Sons, 1995.

[4] J- PiliPl, Thiise-ShifUng Transformers and Passive Harmonic Filters: Interfacing for Power Electronic

Motor Drive Controllers, M.S. Thesis, University of Colorado at Denver, 1993.

(5] J. KASSAKtAN, M. SciiLECiiT, and G. Vercese, Principles of Power Electronics, Massachusetts: Addison-

Weslcy, 1991.

[fi] J. Arrillaga, D. Bradley, and P. BODGHK, Power System Harmonics, New York: John Wiley & Sons, 1985.

[7] a. DoMiJAN and E. Embriz-Santander, a Snmmary and Evaluation ol Recent Developments on Harmonic Mitigation Techniques Useful to Adjitstablc-Speed Drives, IEEE Transacnons on Energy Conversion, Vol.7, No. i,pp. 64-71, March 1992.

[S] S. Feeeland, I. a Unified Analysis ol Converters with Resonant Switches, II. Input-Ctirrent Shaping for

Single-Phase Ac-dc Power Converters, Ph.D. Thesis. Califomia Institute of Technology, 19SS. Chapter 12.

[9] F. C. SciiWARZ. a Time-Domain Analysis ol the Power Factor for Rectifier Systems with Over- and Sub-

critical Inductance, IEEE Transactions on Industrial Electronics aitd Control Instrumentation, Vol. 20, No. 2, May 1973, pp. 61-68.

[10] S. B, DEWAI4, Optimum Input and Output Filters for Single-Phase Reclifier Power Supply, IEEE Transactions on Industry Applications. Vol. 17. No. 3. May/June 19S1, pp. 2S2-2SS.

[11] A. Kelley and W. F. Yadusky, Rectifier Design for Minimum Line-Current Harmonics and Maximum Power Factor, IEEE Transactions on Power Electronics, 7, No. 2, April 1992, pp. 332-341.

[12] A. W. Kelley and W. P. Yadusky, Phase-Controlled Rectifier Line-Current Harmonics and Power Factor as a Function of Firing Angle and Output Filter Inductance, IEEE Applied Power Electronics Conference, 1990 Proceedings, March 1990, pp. 5SS-597.

[13] P. C. Sen, Thyristorized DC Drives, New York: Wiley Inlerscience, 19SI.

[14] S. DewvAN and a. Straloiies, Power Semiconductor Circtnts, New York: John Wiley & Sons, 1975.

[15] B. Pelly, Thyristor Phase-Controlled Converters aud Cycloconverters: Operaliott, Control, and Performance, New York: John Wiley & Sons, 1971.

Problems

17.1

The hiiif-conLroUed single-phiise rectifier circuit of Fig. 17.28 coniains a large inJuclor L. whose current i(t) conlain.s iiegiigible ripple. The thyristor delay angle is a.

i (t)

Fig. 17.28 Half-controlled rectifiei-circuit of Problem 17,1,

(a) Sketch the waveforms v(t) and iJt) Label the conduction intervals of each thyri.stor and diode.

(b) Derive an expression for the dc output voltage V, as a function of the rms litte-line voltage and the delay angle.

(c) Derive an expression lor the power factor.

(d) Over what range of tx are your expressions of parts (b) and (c) valid?

The half-controlled rectifier circuit of Fig. 1729 contains a large inducttjr L, whose current tff) contains negligible ripple. The thyristor delay angle is 01.

Jfi кйз *

1ЛПР

dcload R

Fig. 17,29 Tht-phase half-controlled rectifier circuit of Problem 17.2.

<a) Sketch the waveforms v,/;) and i/f). Label the conduction intervals of each thyristor and diode.

(b) Derive an expression for the dc output voltage V, as a function of the rms line-line vohage and the delay angle.

ft) Derive an expression for the power factor,

(d) Over what range uf ix are your expressions of parts (b) and (c) valid?

A 3jt SCR bridge is connected directly to a resistive luad, as illustrated in Fig. 17.30. This circuii operates in the contintious conduction mode for small delay angle a, and in the discontinuou.s conduction mode for sufficiently large a.

avQ, ltQ2 ifQ,

dc load

Fig. 17.30 Three-phase controlled rectifier circuit of Problem 17.3.

(a) Sketch the output voltage wavefonn v{!). for CCM operation and for DCM operation. Clearly label the conduction intervals of each SCR.

(b) Uiider what condition.s does the rectifier operate in CCM? in DCM.

(e) Derive an expression for the dc component oflhe oiitput voltage in CCM. (d) Repeat pari (c), for DCM operation.

17.4 A rectifier is connected to the Й0 Hz utility system. It is desired ti) design a harmonic trap rdtei that has negligible attenuation or amplification of ht) Hz ctirrents. but which attentutes both the fifth- and seventh-harmonic currents by a facior of 10 (- 20 dB). Tlie ac line inductance is 500 p-U.

(a) Select Lj, the inductance of the fifth harmonic trap, equal to 500/Ш, andLj, the inductance of the seventh harmonic trap, equal to 250 f H. Compute first-pass values for the resistor and capacitor values ofthe fifth and seventh harmonic trap circuits, neglecdng the effects ofparaJlel resonance.

(b) Plot the frequency resfionse of your fiher. It is suggested lhat you do ihis using SPlCE or a similar computer piograui. Does your filter meet the attenuation specifications? Are there significant parallel re.soiiances? Vhat is the gain or attenuation al the third harmonic frequency?

(c) Modify your elemeni values, to obtain the best design you can. You must choose = 500 )iH, but you may change all other element values. Plot the frequency response of your improved filter. Best means that the 20 dB attenuations are obtained at the fifth and seventh harmonic fre-queiicie.s, lhat the gain at 6(1 Hz is esseiitially 0 dB, and that the (7-fattors of parallel resonmices are minimized.

17.5 A rectifier is connected to the 50 Hz utility system, ll is desired to design a harmonic trap filter lhat has negligible attenuation or amplification of 50 Hz currents, but that attenuates the fifth-, seventh-, and eleventh-harmonic currents by a factor of 5 (- 14 dB). In addidon, the tllter must contain a single-pole respon.ie lhat attenuates the thirteenth and higher harmonics by a factor of 5ii/l3, where n is the harmonic number. The ac line inductance is l(X)ltl.

Design a harmonic trap filter that meets these specifications. Design the ijest filter you can, which meets the attenuation specifications, that has nearly unity (0 dB ± i dB) gain at 50 Hz, and that h.is minimum gains at the third and ninth harmonics. Plot the frequency response of у our fdter, and specify your circuit element values.

17.6 A single-phase rectifier operates from a 230 Vrms 50 Hz European single-phase source. The lectitier must supply a КХЮ W dc load, and must meet the lEC-lUUO class A or c]a.ss D harmonic current limits. The circtiit of Fig. 17.1 is to be used. The dc load voltage may have lOO Hz ripple whose peak-to-peak amplitude is no gi-eaterthan iVo ofthe dc vohage coinponent

(a) Estimate the minimum value of inductance lhat will meet these requirements.

(b) Specify values of L and С that meet these requirements, and prove (by simulation) that your design is correct.

17.7 Figure 17.31 illustrates a twelve-pulse rectifier, containing six controlled (SCR) devices and six uncontrolled (diode) devices. The dc filler inductance L is large, such thai its cunent ripple is negligible. The SCRs operate with delay angle Сй. The SCR. bridge is driven by a wye-wye connected three-phase transformer circuit, while the diode bridge is driven by a wye-deha connected three-phase transformer circuit. Since both transformer circuit.s have wye-connecied primaries, they can be combined lo realize the circuit with a single wye-connected primary.

(a) Determine the rms magnitudes and phases ofthe line-to-line output voltages ofthe transformer secnndaries i(,i and ViiT function ofthe applied line-line primary voltage v .

(b) Sketch the waveforms ofthe vohages v,j(0 and Label the conduction intervals of each thyristor and diode.